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Build Profiles (CLI)

Build profiles save a target and tool arguments as a reusable configuration. Profiles are scoped to a project.

List profiles

ssynth profile list --project <PROJECT_ID>

Create a profile

ssynth profile create \
  --project <PROJECT_ID> \
  --name fast-timing \
  --target ice40:hx8k:ct256 \
  --description "Optimized for Fmax" \
  --yosys-passes abc9,opt \
  --nextpnr-flags --tmg-ripup \
  --bitstream-flags --compress
FlagRequiredDescription
--project <ID>yesProject ID
--name <NAME>yesProfile name (unique per project, max 100 chars)
--target <ID>yesFPGA target (e.g., ice40:hx8k:ct256)
--description <TEXT>noDescription (max 500 chars)
--yosys-passes <CSV>noComma-separated Yosys passes
--nextpnr-flags <CSV>noComma-separated nextpnr flags
--bitstream-flags <CSV>noComma-separated bitstream flags

View a profile

ssynth profile get <PROFILE_ID>

Update a profile

ssynth profile update <PROFILE_ID> --name area-optimized --yosys-passes flatten,abc9

All create flags are accepted. Only specified fields are changed.

Delete a profile

ssynth profile delete <PROFILE_ID>

Using profiles in jobs

Pass --profile when submitting a job to inherit the profile’s target and tool args:

ssynth job submit . --project <PROJECT_ID> --profile <PROFILE_ID>

Per-job flags override profile values. For tool args, the merge rule is per-tool: if you specify a non-empty list for a tool, it replaces the profile’s list for that tool entirely. See hwbuild.yml for details.

Allowed tool arguments

All arguments are validated against an allowlist.

Yosys passes: abc9, abc, opt, opt_clean, opt_expr, opt_merge, opt_reduce, opt_share, freduce, memory_bram, memory_share, techmap, flatten, hierarchy, proc, alumacc

nextpnr flags: --tmg-ripup, --placer-heap-timingweight, --placer-heap-cell-placement-timeout, --router, --placer, --slack-redist-iter, --cstrweight, --starttemp, --parallel-refine

Bitstream flags: --no-promote-globals, --compress, --svf, --idcode