Quick Start
Web
- Sign in at supersynth.ai with your GitHub account
- Create a project (give it a slug and display name)
- Click New Job, select a target, enter your top module name, upload your source
- Watch the logs stream in real time
- Download the bitstream from the Artifacts tab
CLI
# Install
cargo install --git https://github.com/ACS-Org/ssynth-cli
# Authenticate (get an API key from Settings > API Keys in the web UI)
ssynth login --api-key sk_live_YOUR_KEY
# Create a project
ssynth project create --slug my-fpga --name "My FPGA Project"
# Submit a job
ssynth job submit ./src --project <PROJECT_ID> --target ice40:hx8k:ct256 --top top_module
# Watch it run
ssynth job logs <JOB_ID> --follow
# Download results
ssynth artifact download <JOB_ID>
With hwbuild.yml
Put a hwbuild.yml in your project root to avoid repeating CLI flags:
top_module: top
target:
family: ice40
device: hx8k
package: ct256
seeds: 4
pick: best_timing
Then submit with just:
ssynth job submit . --project <PROJECT_ID>
See hwbuild.yml reference for all options.