Projects (Web)

Creating a project

1. From the dashboard, click New Project
2. Enter a slug (lowercase, hyphens, used in URLs) and a display name
3. Optionally select a default target
4. Click Create

Project page

The project page has four tabs:

Jobs tab

Lists all jobs in the project, newest first. Filter by status: All, Created, Queued, Running, Completed, Failed, Canceled, Terminated.

Click New Job to submit a synthesis job (see Submitting Jobs).

Targets tab

Read-only list of available FPGA targets. Shows family, device, package, board, and toolchain lane for each.

Profiles tab

Create and manage build profiles for the project. Each profile bundles a target and tool arguments (Yosys passes, nextpnr flags, bitstream flags) into a reusable configuration.

To create a profile, fill in the inline form at the top of the tab:

• Name — unique within the project (e.g., fast-timing, area-optimized)
• Target — select an FPGA target
• Description — optional
• Yosys Passes — comma-separated extra passes (e.g., abc9, opt)
• Nextpnr Flags — comma-separated extra flags (e.g., --tmg-ripup)
• Bitstream Flags — comma-separated extra flags (e.g., --compress)

Profiles appear in the Build Profile dropdown when creating a new job. Selecting a profile pre-fills the target and applies its tool arguments. You can still override individual settings per job.

Settings tab

Configure project defaults:

• Display name
• Retention period — how long to keep artifacts (7, 30, or 90 days)
• Default max runtime — time limit for jobs
• Default max memory — memory limit for jobs

These defaults apply to new jobs unless overridden at submission time.